Many engineering applications use analog to digital (A/D) converters to translate signals from analog form to digital form. Analog to digital converters typically employ sophisticated processing algorithms to improve performance. In many cases, multiple analog to digital converters are employed to digitize multiple analog input channels. When multiple analog to digital converters are used, the relative occurrence in time of the data between data streams is of utmost importance for achieving the desired processing performance in many applications. Most readily available analog to digital converter products make available to the user an external trigger for this purpose. It is difficult for each analog to digital converter to consistently begin acquisition in exact synchronism with the other analog to digital converters in the system. This requirement for consistent single-clock trigger accuracy severely narrows the choice of available products, and in some cases it cannot be done without custom hardware design specific to the particular brand of analog to digital converter.
Known analog to digital converter acquisition systems depend primarily on three external user supplied inputs. These are:
1) the external sampling clock which is piped directly to the analog to digital converter and is usually uninterruptible;
2) the external trigger which is usually clock qualified, processed by onboard logic, and eventually used to trigger other circuitry to begin storing successive analog to digital conversions—usually for a programmable number of samples; and
3) the analog input to an analog to digital converter which is the input to be digitized.
In the case of multiple analog channel conversions, if one analog to digital converter produces an output before the others, errors result. When multiple analog to digital converters are setup to acquire multiple parallel analog inputs synchronously, problems can arise with high sample rates due to latency unknowns, variation, drift, and meta-stability with the externally supplied triggers. The resulting analog to digital sample records are then offset by some unknown, and possibly random, number of analog to digital clock cycles from both the common trigger instant and one another, and this creates an apparent large jitter problem which severely degrades the performance of many kinds of phase sensitive data processing.
An analog to digital converter is needed less prone to this error condition. Such analog to digital converter accuracy is an absolute necessity in many digital signal processing applications such as radar and sonar.